During the past few years, a lot of work has been done on behavioral models and simulation tools. But a need for modeling strategy still remains. The VHDL-AMS language supports the description of analog electronic circuits using Ordinary Differential Algebraic Equations (ODAEs), in addition to its support for describing discrete-event systems. For VHDL-AMS to be useful to the analog design ...

Evaluation techniques for semiconductor devices are keys for device development with low cost and short period. Especially, dopant and depletion layer distribution in device is critical for electrical property of the device and is needed to be evaluated. Super-higher-order nonlinear dielectric microscopy (SHO-SNDM) is one of the promising techniques for semiconductor device evaluation. We devel...

colloidal quantum dots offer broad tuning of semiconductor band structure via the quantum size effect. in this paper, we present a detailed investigation on the influence of the thickness of colloidal lead sulfide (pbs) nanocrystals (active layer) to the photovoltaic performance of colloidal quantum dot solar cells. the pbs nanocrystals (qds) were synthesized in a non-coordinating solvent, 1-oc...

In this paper, we solve numerically a semiconductor device energy balance equation using monotone iterative method. With the proposed solution technique, we prove the solution of ̄nite volume discretized semiconductor device energy balance equation converges monotonically. The method presented here provides an e± cient approach for the numerical solution of energy balance equation in submicron ...

Semiconductor Slow-Light Device

A semiconductor processing method for the formation of self-aligned via and trench structures in III-V semiconductor devices in particular, on InP platform is presented, together with fabrication results. As a template for such self-aligned via and trench formations in a surrounding polymer layer on a semiconductor device, we make use of a sacrificial layer that consists of either a SiO2 dielec...

The performance of the manufacturing process in each of these areas determines the overall manufacturability of the process. As device geometries are reduced, understanding and minimizing the sources of process-induced defects is critical to achieving and maintaining high device yields. This paper presents comprehensive the investigating a novel metrology on semiconductor process module integra...